祁亮

祁亮/ 长聘教轨副教授、博士生导师
祁亮
电子邮箱：qi.liang@sjtu.edu.cn
办公电话：
办公地点：微电子楼427室

 

        祁亮，上海交通大学微纳电子学系长聘教轨副教授、博士生导师，入选第八届中国科协青年托举计划，上海市浦江人才计划，科研领域包括高性能模数转换器、无线收发机及生物医疗电子。相关的研究成果在国际会议和期刊上发表超过30篇学术论文，包括6x ISSCC/ISSCC-SRP/VLSI/CICC, 2x JSSC, 5x TCASI/II, 等。
        祁亮于2019年在澳门大学取得博士学位。2016-2017年在德国乌尔姆大学交流访问。博士毕业后曾在华为海思无线射频部工作，从事模拟集成电路设计，于2020年8月加入上海交通大学微纳电子学系。
        祁亮博士目前主持国家重点研发计划港澳台专项，国家自然科学基金，华为海思联合研发等项目。他曾获得2021年度IEEE ASICON 杰出青年学者论文奖；2021、2022年度全国大学生集成电路创新大赛优秀指导教师称号； 2016年度澳门特别行政区研究生科技研发奖。
        祁亮博士目前担任IEEE Transactions on Circuits and Systems II (IF=3.3)的副编辑，并担任IEEE APCCAS, ICSICT, ICTA及ASICON等多个会议TPC成员。

研究方向：

  1. 高性能模数转换器设计（包括奈奎斯特和过采样）
  2. 模拟与混合信号芯片设计
  3. 生物医疗芯片设计

 

代表论文：

  1. Liang Qi, A. Jain, D. Jiang, S.-W. Sin, R. P. Martins and M. Ortmanns, “A 76.6dB-SNDR 50MHz-BW 29.2mW Noise Coupling Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOS”, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2019.
  2. Liang Qi, A. Jain, D. Jiang, S.-W. Sin, R. P. Martins and M. Ortmanns, “A 76.6dB-SNDR 50MHz-BW 29.2mW Multibit CT Sturdy MASH ΔΣ Modulator with DAC Non-linearity Tolerance”, in IEEE Journal of Solid-State Circuits, Vol. 55, No. 2, pp. 344-355, Feb. 2020.
  3. Liang Qi, S.-W. Sin, S.-P. U, R. P. Martins and F. Maloberti, “A 4.2mW 77.1dB-SNDR 5MHz-BW DT 2-1 MASH ΔΣ Modulator with Multirate Opamp Sharing”, in IEEE Transactions on Circuits and Systems I – Regular Papers, Vol. 64, No. 10, pp. 2641-2654, Oct. 2017.
  4. Liang Qi, S.-W. Sin, S.-P. U and R. P. Martins, “Resolution-enhanced sturdy MASH delta–sigma modulator for wideband applications”, in IET, Electronics Letters, Vol. 51, No. 14, pp. 1061–1063, Jul. 2015.
  5. D.Jiang, Liang Qi, S.-W. Sin, F. Maloberti, and R. P. Martins, “A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation”, in IEEE Journal of Solid-State Circuits, vol. 56, no. 8, pp. 2375-2387, Aug. 2021.
  6. D.Jiang, S.-W. Sin, Liang Qi, G. Wang and R. P. Martins, “Recent Advances in High-Resolution Hybrid Discrete-Time Noise-Shaping ADCs”, in IEEE Open Journal of the Solid-State Circuits Society, vol. 1, pp. 129-139, Oct. 2021.
  7. Liang Qi, X. Qin, S.-W. Sin, C. Chen, F. Ye, G. Shi and G. Wang, “Advances in Continuous-time MASH ΔΣ Modulators”, IEEE International Conference on ASIC (ASICON), Oct. 2021. (Outstanding Young Scholar Paper Award)
  8. Liang Qi, S.-W. Sin and R. P. Martins, “Multibit sturdy MASH delta-sigma modulator with error-shaped segmented DACs for wideband low-power applications”, IEEE International Conference on ASIC (ASICON), Oct. 2019. (Excellent Student Paper)
  9. X.Qin, J Zhang, Liang Qi*, S.-W. Sin, R. P. Martins and G. Wang, Discrete-Time MASH Delta-Sigma Modulator with Second-Order Digital Noise Coupling for Wideband High-Resolution Applications, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-5, May 2021.
  10. J.Zhang, G. Tan, Y. Hu, J. Zhao, M. Chen, Y. Li and Liang Qi*, A Multi-Rate Hybrid DT/CT MASH ΔΣ Modulator with High Tolerance to Noise Leakage, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-5, May 2021.

 

本科生专业必修课：

工程实践与科技创新I-实践模块 32课时

本科生专业选修课:
MR318 《高性能集成电路测试基础》32课时

研究生专业选修课:
EST8719 《高性能模数转换器设计》48课时

微纳电子学系