孙亚男

        孙亚男博士，现任上海交通大学微纳电子学系副教授，博士生导师。2009年获得上海交通大学微电子学本科学位，2015年获得香港科技大学电子及计算机工程学博士学位，同年加入上海交通大学，从事教学与科研工作。入选上海市扬帆人才计划。IEEE高级会员。

        主要研究方向是高能效数字集成电路及系统设计。研究成果发表在IEEE JSSC, TCAS-I, TCAS-II, TCAD, TED, TVLSI等电路与系统权威学术期刊，以及IEEE ISSCC, DAC, DATE, ISCAS等国际重要会议上。曾获IEEE DATE（欧洲设计自动化与测试学术会议）最佳论文提名奖， IEEE ICM（微电子国际会议）的最佳论文奖。主持国家自然科学基金面上项目、上海市“科技创新行动计划”自然科学基金面上项目、上海市扬帆计划项目、CCF腾讯犀牛创意基金等科研项目。担任IEEE/ACM GLVLSI、ICTA、ISQED等国际会议的TPC Member，以及IEEE APCCAS、AICAS国际会议的WiCAS & YPP (Women in Circuits and Systems & Young Professionals Program)主席 ；并担任多个领域权威学术期刊和会议的审稿人。

        承担数字集成电路设计及前沿技术等相关课程，致力于产学研协同育人，主持教育部产学合作协同育人项目、校级“双一流”优质课程建设项目等。曾获国家级一流本科课程、上海市高等学校一流本科课程、校级一流本科课程。

【研究方向】

1. 基于新型纳米技术的数字集成电路与系统设计
2. 存内计算及三维集成电路设计
3. 神经网络加速器及边缘计算

【论文发表】

• 近年来主要期刊论文 (Journal Publications)

[1] Y. Sun, D. Wang, L. Xu, Y. Chen, Z. Li, S. Liu, W. He, Y. Liu, H. Yang, and X. Li, “CREAM: Computing in ReRAM-Assisted Energy- and Area-Efficient SRAM for Reliable Neural Network Acceleration,” IEEE Transactions on Circuits and Systems I (TCAS-I), 2023.

[2] Y. Sun, Z. Li, W. Liu, W. He, Q. Wang, and Z. Mao, “BC-MVLiM: A Binary-Compatible Multi-Valued Logic-in-Memory based on Memristive Crossbars,” IEEE Transactions on Circuits and Systems I (TCAS-I), Vol. 70, No. 5, pp. 2048 – 2061, May 2023.

[3] S. Yuan, Y. Sun*, W. He*, Q. Gu, S. Xu, Z. Mao, and S. Tu, “MSLM-RF: A spatial feature enhanced random forest for on-board hyperspectral image classification,” IEEE Transactions on Geoscience and Remote Sensing, Vol. 60, pp. 1-17, July 2022.

[4] Y. Sun, C. Ma, Z. Li, Y. Zhao, J. Jiang, W. Qian, R. Yang, Z. He, and Li Jiang, “Unary coding and variation-aware optimal mapping scheme for reliable ReRAM-based neuromorphic computing,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 40, No. 12, pp. 2495 – 2507, December 2021.

[5] Z. Song, Y. Sun*, L. Chen, T. Li, N. Jing, X. Liang, and L. Jiang*, “ITT-RNA: Imperfection tolerable training for RRAM-crossbar based deep neural-network accelerator,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 40, No. 1, pp. 129-142, January 2021.

[6] C. Lin, W. He, Y. Sun, B. Pei, P. K. Chundi, Z. Mao, and M. Seok, “MEDAC: A metastability condition detection and correction technique for a near-threshold-voltage multi-voltage-/frequency-domain network-on-chip,” IEEE Journal of Solid-State Circuits, Vol. 56, No. 7, pp. 2270-2280, July 2021.

[7] Y. Sun, W. He, Z. Mao, H. Jiao, and V. Kursun, “Monolithic 3D carbon nanotube memory for enhanced yield and integration density,” IEEE Transactions on Circuits and Systems I (TCAS-I), Vol. 67, No. 7, pp. 2431-2441, July 2020.

[8] Y. Sun, J. Gu, W. He, Q. Wang, N. Jing, Z. Mao, W. Qian, and L. Jiang, “Energy-efficient nonvolatile SRAM design based on resistive switching multi-level cells,” IEEE Transactions on Circuits and Systems II (TCAS-II), Vol. 66, No. 5, pp. 753-757, May 2019. (invited paper)

[9] Y. Sun, W. He, Z. Mao, H. Jiao, and V. Kursun, “Metallic-CN-removal-tolerant high-yield six-CNMOSFET SRAM cell for carbon-based embedded memory,” IEEE Transactions on Electron Devices (TED), Vol. 65, No. 3, pp. 1230-1238, March 2018.

• 近年来主要会议论文 (Conference Publications)

[1] L. Xu, S. Liu, Z. Li, D. Wang, Y. Chen, Y. Sun*, X. Li*, W. He, and S. Xu, “CREAM: Computing in ReRAM-assisted energy and area-efficient SRAM for neural network acceleration,” ACM/EDAC/IEEE Design Automation Conference (DAC), 2022.

[2] Z. Meng, Y. Sun, and W. Qian, “Write or not: Programming scheme optimization for RRAM-based neuromorphic computing,” ACM/EDAC/IEEE Design Automation Conference (DAC), 2022.

[3] C. Lin, W. He, Y. Sun, Z. Mao, and M. Seok, “CDAR-DRAM: An in-situ charge detection and adaptive data restoration DRAM architecture for performance and energy efficiency improvement,” ACM/EDAC/IEEE Design Automation Conference (DAC), 2021.

[4] Z. Meng, W. Qian*, Y. Zhao, Y. Sun*, R. Yang, and L. Jiang*, “Digital offset for RRAM-based neuromorphic computing: A novel solution to conquer cycle-to-cycle variation,” Proceedings of the IEEE Design, Automation and Test in Europe Conference (DATE), March 2021.

[5] W. Liu, Y. Sun*, W. He, and Qin Wang, “Design of ternary logic-in-memory based on memristive dual-crossbars,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2021.

[6] C. Ma, Y. Sun*, W. Qian*, L. Jiang*, and R. Yang, “Go unary: A novel synapse coding and mapping scheme for reliable ReRAM-based neuromorphic computing,” Proceedings of the  IEEE Design, Automation and Test in Europe Conference (DATE), pp. 1432-1437, March 2020. (Nominated for Best Paper Award)

[7] C. Lin, W. He, Y. Sun, B. Pei, Z. Mao, and M. Seok, “A near-threshold-voltage network-on-chip with a metastability error detection and correction technique for supporting a quad-voltage/frequency-domain ultra-low-power system-on-a-chip,” Proceedings of the  IEEE International Solid-State Circuits Conference (ISSCC), pp. 394-396, February 2020.

[8] Z. Song, Y. Zhao, Y. Sun, X. Liang, L. Jiang, “ESNreram: An energy-efficient sparse neural network based on resistive random-access memory,” ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 291-296, September 2020.

【近年来主要科研及教学获奖】

1. 国家级一流本科课程,《数字集成电路设计》, 2023
2. 上海交通大学一流本科课程,《数字集成电路设计》, 2022
3. 最佳论文提名奖, IEEE DATE, 2020
4. 上海高等学校一流本科课程,《数字集成电路设计》, 2020
5. 上海交通大学教学成果奖一等奖, 2020
6. 上海交通大学电院第四届青年教师教学竞赛优秀奖, 2020
7. 最佳指导教师奖, 第三届中国研究生创“芯”大赛, 2020
8. 优秀指导教师奖, 全国大学生集成电路创新创业大赛, 2019, 2020, 2021
9. 上海交通大学优秀班主任, 2018

【授课教学】

本科生：数字逻辑设计（人工智能班），数字集成电路设计，微纳电子科技前沿讲座

研究生：高等数字集成电路设计，集成电路设计前沿技术