张宸/ 长聘教轨助理教授
研究方向:AI芯片与系统
电子邮箱:chenzhang.sjtu@sjtu.edu.cn
办公电话:
办公地点:综合实验楼2-215
张宸博士于2023年5月加入上海交通大学电子信息与电气工程学院微纳电子学系,任长聘教轨助理教授。此前,张宸博士2017年从北京大学博士毕业,主攻人工智能处理器研究。期间于2015-2016前往美国加州大学洛杉矶分校学术访问。毕业后加入微软研究院,任职至主管研究员。于2021年初加入阿里巴巴平头哥半导体有限公司。作为AI芯片核心架构师,负责人工智能加速单元及集群芯片互联相关功能设计。
主要研究方向为人工智能系统的体系结构和设计自动化的研究,通过对 “算法-系统-硬件”的跨层次垂直整合,通盘完整的软硬件架构优化,突破AI芯片的性能瓶颈,支撑高速增长的算力需求。围绕上述研究方向,张宸博士在体系结构、EDA和人工智能重要国际会议和期刊发表论文21篇(其中CCF-A类10篇)。总引用量4000余次,最高单篇论文引用量超2000余次。获得多项奖励和荣誉,包括FPGA-15最佳论文提名,FPGA会议历史高被引论文(第一名),体系结构 MICRO-2022 年度最佳论文提名,Donald O. Pederson最佳论文奖(首个中国大陆获奖者),连续三年(2021/2022/2023)获得由中国工程科技知识中心评选的“AI 2000 人工智能芯片技术世界最有影响力学者(第二名)”,连续两届(2019/2021 )入选斯坦福评选的“世界前2%高被引科学家(计算机硬件与体系结构领域)”,ACM China SIGOPS新星奖,微软研究院院长特别奖等。担任多个多个领域权威学术期刊和会议的审稿人和会议主席,包括IEEE/ACM TCAD、ICCAD、DAC、FPGA、NeuroIPS、CVPR、ICLR、ISCA、MICRO、ChinaSys等。
研究方向:
1. 人工智能芯片架构与系统
2. 高能效与低功耗计算
3. 芯片设计自动化
代表论文:
[1] Zhang Chen, Sun Guangyu, Fang Zhenman, Zhou Peipei, Pan Peichen, Cong Jason; Caffeine: Toward uniformed representation and acceleration for deep convolutional neural networks; IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 38; 2018 (11), 2072-2085.
1. Guo Cong, Tang Jiaming, Hu Weiming, Leng Jingwen, Zhang Chen, Yang Fan, Liu Yunxin, Guo Minyi, Zhu Yuhao; OliVe: Accelerating Large Language Models via Hardware-friendly Outlier-Victim Pair Quantization; In Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023; 1-15;
2. Guo Cong, Zhang Chen, Leng Jingwen, Liu Zihan, Yang Fan, Liu Yunxin, Guo Minyi, Zhu Yuhao; Ant: Exploiting adaptive numerical data type for low-bit deep neural network quantization; In Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022; 1414-1433;
3. Guo Cong, Qiu Yuxian, Leng Jingwen, Zhang Chen, Cao Ying, Zhang Quanlu, Liu Yunxin, Yang Fan, Guo Minyi; Nesting Forward Automatic Differentiation for Memory-Efficient Deep Neural Network Training; In Proceedings of the IEEE 40th International Conference on Computer Design (ICCD), 2022; 738-745;
4. Wang Yang, Zhang Chen*, Xie Zhiqiang, Guo Cong, Liu Yunxin, Leng Jingwen; Dual-side sparse tensor core; In 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture; 2021, 1083-1095.
5. Guo Cong, Qiu Yuxian, Leng Jingwen, Gao Xiaotian, Zhang Chen, Liu Yunxin, Yang Fan, Zhu Yuhao, Minyi Guo; SQuant: On-the-Fly Data-Free Quantization via Diagonal Hessian Approximation; In International Conference on Learning Representations, 2021.
6. Li Yun, Zhang Chen*, Han Shihao, Zhang Li Lyna, Yin Baoqun, Liu Yunxin, Xu Mengwei; Boosting Mobile CNN Inference through Semantic Memory; In Proceedings of the 29th ACM International Conference on Multimedia; 2021, 2362-2371.
7. Jiang Shuang, Ma Zhiyao, Zeng Xiao, Xu Chenren, Zhang Mi, Zhang Chen, Liu Yunxin; Scylla: Qoe-aware continuous mobile vision with fpga-based dynamic deep neural network reconfiguration; In IEEE INFOCOM 2020-IEEE Conference on Computer Communications; 2020, 1369-1378.
8. Mao Yihuan, Wang Yujing, Wu Chufan, Zhang Chen, Wang Yang, Zhang Quanlu, Yang Yaming, Tong Yunhai, Bai Jing; LadaBERT: Lightweight Adaptation of BERT through Hybrid Model Compression; In Proceedings of the 28th International Conference on Computational Linguistics; 2020, 3225-3234.
9. Wang Shang, Zhang Chen*, Shu Yuanchao, Liu Yunxin; Live video analytics with FPGA-based smart cameras; In Proceedings of the 2019 Workshop on Hot Topics in Video Analytics and Intelligent Edges; 2019, 9-14.
10. Cong Jason, Fang Zhenman, Hao Yuchen, Wei Peng, Yu Cody Hao, Zhang Chen, Zhou Peipei; Best-Effort FPGA Programming: A Few Steps Can Go a Long Way; arXiv e-prints; 2018, 1807.
11. Yao Zhuliang, Cao Shijie, Xiao Wencong, Zhang Chen*, Lanshun Nie; Balanced sparsity for efficient dnn inference on gpu; In Proceedings of the AAAI Conference on Artificial Intelligence; 2019 33(01), 5676-5683.
12. Cao Shijie, Zhang Chen*, Yao Zhuliang, Xiao Wencong, Nie Lanshun, Zhan Dechen, Liu Yunxin, Wu Ming, Zhang Lintao; Efficient and effective sparse LSTM on FPGA with bank-balanced sparsity; In Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays; 2019, 63-72.
13. Cao Shijie, Ma Lingxiao, Xiao Wencong, Zhang Chen*, Liu Yunxin, Zhang Lintao, Nie Lanshun, Yang Zhi; Seernet: Predicting convolutional neural network feature-map sparsity through low-bit quantization; In Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition; 2019, 11216-11225.
14. Guan Yijin, Xu Ningyi, Zhang Chen, Yuan Zhihang, Cong Jason; Using data compression for optimizing FPGA-based convolutional neural network accelerators; In International workshop on advanced parallel processing technologies; 2017, 14-26.
15. Zhang Chen, Fang Zhenman, Zhou Peipei, Pan Peichen, Cong Jason; Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks; In Proceedings of the 35th International Conference on Computer-Aided Design; 2016, 1-8.
16. Zhang Chen, Li Peng, Sun Guangyu, Guan Yijin, Xiao Bingjun, Cong Jason; Optimizing fpga-based accelerator design for deep convolutional neural networks; In Proceedings of the 2015 ACM/SIGDA international symposium on field-programmable gate arrays; 2015, 161-170.
17. Wang Peng, Sun Guangyu, Jiang Song, Ouyang Jian, Lin Shiding, Zhang Chen, Cong Jason; An efficient design and implementation of LSM-tree based key-value store on open-channel SSD; In Proceedings of the Ninth European Conference on Computer Systems; 2014, 1-14.
18. Zhang Chen, Wu Di, Sun Jiayu, Sun Guangyu, Luo Guojie, Cong Jason; Energy-efficient CNN implementation on a deeply pipelined FPGA cluster; In Proceedings of the 2016 International Symposium on Low Power Electronics and Design; 2016, 326-331
19. Wang Yuxin, Li Peng, Zhang Peng, Zhang Chen, Cong Jason; Memory partitioning for multidimensional arrays in high-level synthesis; In Proceedings of the 50th Annual Design Automation Conference; 2013, 1-8.
20. Wang Yuxin, Li Peng, Zhang Peng, Zhang Chen, Cong Jason; Automatic multidimensional memory partitioning for FPGA-based accelerators; In Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays; 2013, 269-269.
近年来主要科研获奖:
[2022]体系结构2022年度最佳论文提名
[2022] ACM China SIGOPS新星奖, ACM
[2022] AI 2000人工智能世界最有影响力学者(芯片技术,第二名),中国工程科技知识中心
[2021] 全球引用量前2%学者(计算机硬件与架构), 斯坦福& 爱思唯尔
[2019] Donald O. Pederson 最佳论文奖 (中国大陆首个获奖者), IEEE CEDA
[2019] 微软研究院院长特别奖 (1/50)
[2015] FPGA 2015最佳论文提名 (第一作者),ACM