| Master Theses 2012 |
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Hui Xu
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A Hierarchical Symbolic Simulator for Analog Circuit Design |
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He Zhang
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A Symbolic Method for Time-Domain Analog Circuit Modeling |
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Xiaopeng Li
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Hierarchical Symbolic Sensitivity Analysis with Application to Analog Design Optimization |
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Binbin Weng
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Design Optimization of MOS Operational Amplifiers Using Finite Difference Sensitivity |
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| Master Theses 2011 |
|
Weijian Huang
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On Global Clock Mesh Syntheses And Optimization |
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Diming Ma
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New Progress Of Symbolic Simulator Applications On Cmos Analog Circuit Design Automation |
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| Master Theses 2010 |
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An Chen
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Symbolic Moment and Moment Sensitivity Computation Method With Application to Crosstalk Avoidance in Routing |
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Shuo Chen
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A New Hierarchical Method for Symbolic Analog Circuit Simulation |
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Ji Li
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Development Of A Graphical User Interface For An Analog Symbolic Simulator(grass) With Design Applications |
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Kunyuan Tan
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An Investigation on the Dependence of Symbolic Simulator on Small Signal Models and the Application of Symbolic Simulator for Improving Analog Design Yield |
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Ting Wang
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A Heuristic Algorithm to Improve the Performance of a Symbolic Analog Circuit Simulator |
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Mei Zeng
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Symbolic Techniques For Band Width And Phase Margin Optimization In Analog Integrated Circuit Design |
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| Master Theses 2009 |
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Shijie Huang
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A Survey On Multilevel Router Considering Crosstalk And Timing Optimization |
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An Liu
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A Symbolic Approach To The Signal Integrity Of Multi-coupled Rlc Tree Circuits With Application |
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Xiaoxuan Meng
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Symbolic AC Sensitivity Analysis for Analog Design |
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Di Xu
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Symbolic Moment Calculation of RC Tree Circuit and its Application of Delay Metrics |
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Xuhong Yu
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Statistical Interconnect Timing Analysis Based On Symbolic Method |
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Xiangyu Zhu
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A Research On Low Cost Implementing Of Runtime Fault Diagnosis In Digital Integrated Circuits |
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| Master Theses 2008 |
|
Zhigang Hao
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Research On The High-speed Parametric Multi-port Interconnect Analysis Techniques
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Liguo Jiang
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Simultaneous Switch Noise Simulation Based on Macro-model
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Xiaonan Li
|
A Survey On Timing Balance Based On Multilevel Routing Framework
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Xiuyu Peng
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RLC Parasitic Parameter Extraction and Reduced-Order Modeling of High-Frequency Transmission Lines
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Liu Wang
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Ibis Modeling And Simulation Method For Signal Integrity
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| Master Theses 2007 |
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Weiwei Chen
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A Symbolic Analog Circuit Simulator
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Liqun Deng
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Signal Integrity Analysis Base on Model Order Reduction |
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Jie Hong
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Model Compiler and the Application in Interconnect Modeling, Signal Integrity |
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