王琴/研究员、博导
个人简介
王琴，研究员，博士生导师。1997年电子科技大学本科毕业（电子工业部优秀毕业生），2004年上海交通大学博士毕业，2007起任上海交通大学副教授，2009年美国加州大学圣地亚哥分校访问学者，2011年美国IBM公司访问学者，2020年起任上海交通大学研究员，美国IEEE学会会员，日本IEICE学会会员，专业领域是深度学习算法、大规模集成电路SoC设计，承担过国家核高基重大专项、国家自然基金项目等项目，进行了高性能低功耗处理器、大规模SoC、算法及硬件加速器等项目研发，在国内外期刊上发表论文五十余篇，曾获得中国航空工业总公司科学进步奖。
注重学生动手实践与创新研究能力的培养，带领团队完成过130nm、90nm、65nm、40nm、28nmCMOS工艺系统芯片设计及流片，芯片设计方法同步业界最新发展。指导学生获得过全国电子设计竞赛、集成电路创新大赛、研究生创“芯”大赛全国多项奖项，包含多次全国最高奖项，指导本科生曾获得全国大学生集成电路创新大赛全国总决赛特等奖，指导研究生曾获得华为杯中国研究生全国决赛一等奖、华为专项奖全国一等奖、Synopsys专项奖，获得多次教育部、工信部、上海学位委员会颁发的优秀指导教师奖，曾获得上海交通大学优秀党员、优秀教师奖、三育人先进个人、三八红旗手、教书育人等多个奖项。毕业学生主要去向：英伟达、AMD、华为、思科、Intel、阿里巴巴等。
招收集成电路设计、微电子、电子科学与技术、计算机体系架构方向硕士、博士、博士后、青年教师。博士和学硕报名电子科学与技术专业，专硕报集成电路工程。
注重学生动手实践与创新研究能力的培养，带领团队完成过130nm、90nm、65nm、40nm、28nmCMOS工艺系统芯片设计及流片，芯片设计方法同步业界最新发展。指导学生获得过全国电子设计竞赛、集成电路创新大赛、研究生创“芯”大赛全国多项奖项，包含多次全国最高奖项，指导本科生曾获得全国大学生集成电路创新大赛全国总决赛特等奖，指导研究生曾获得华为杯中国研究生全国决赛一等奖、华为专项奖全国一等奖、Synopsys专项奖，获得多次教育部、工信部、上海学位委员会颁发的优秀指导教师奖，曾获得上海交通大学优秀党员、优秀教师奖、三育人先进个人、三八红旗手、教书育人等多个奖项。毕业学生主要去向：英伟达、AMD、华为、思科、Intel、阿里巴巴等。
招收集成电路设计、微电子、电子科学与技术、计算机体系架构方向硕士、博士、博士后、青年教师。博士和学硕报名电子科学与技术专业，专硕报集成电路工程。
研究方向
1.高性能低功耗体系架构的研究
2.基于RISC-V/ARM的SoC设计
3.图像及语音的人工智能算法及硬件加速器研究
4.高能效体系架构及三维集成设计
2.基于RISC-V/ARM的SoC设计
3.图像及语音的人工智能算法及硬件加速器研究
4.高能效体系架构及三维集成设计
论文发表
1.Zhang, Y.; Sheng, W.; Jiang, J.; Jing, N.; Wang, Q*; Mao, Z. Priority Branches for Ship Detection in Optical Remote Sensing Images. Remote Sens. 2020, 12, 1196.
2.Qin Wang, Z. Liu, J. Jiang*, N. Jing and W. Sheng, A New Cellular-Based Redundant TSV Structure for Clustered Faults[J]. IEEE transactions on very large scale integration (VLSI) systems, 2019, 27(2):458-467.
3.Jianfei Wang, Qin Wang, Li Jiang, Chao Li, Xiaoyao Liang, and Naifeng Jing*, “IBOM: An Integrated and Balanced On-Chip Memory for High Performance GPGPUs”, IEEE Transaction on Parallel and Distributed Systems (TPDS), 29(3): 586-599, 2018.
4.Qin Wang, Shen F , Shen L ,J Huang, W.Sheng*. Lung Nodule Detection in CT Images Using a Raw Patch-Based Convolutional Neural Network[J]. Journal of Digital Imaging, 2019(32):971-979.
5.Yanan Sun ,Jiawei Gu ,Weifeng He , Qin Wang ; Naifeng Jing, Zhigang Mao； Weikang Qian ; Li Jiang “Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells”， IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: 66 , Issue: 5 , May 2019 ) ，Pages: 753 - 757
6.Taozhong Li, Qin Wang, Yongxin Zhu, Jianfei Jiang, Guanghui He, Jing Jin, Zhigang Mao, Naifeng Jing*, “A Novel Resistive Memory based Process-In-Memory Architecture,ACM Transaction on Design Automation of Electronics System (TODAES), 2019.
7.Sijie Zheng, Hongjun You, Guanghui He, Qin Wang, Tao Si, Jianfei Jiang ;Jing Jin ; Naifeng Jing，“A Rapid Scrubbing Technique for SEU Mitigation on SRAM-Based FPGAs”，2019 IEEE International Symposium on Circuits and Systems (ISCAS)， Pages: 1 – 5
8.Shuo Zhang, Guanghui He, Hai-Bao Chen, Naifeng Jing, Qin Wang，“Scale Adaptive Proposal Network for Object Detection in Remote Sensing Images”， IEEE Geoscience and Remote Sensing Letters，Year: 2019，Volume: 16 , Issue: 6， Pages: 864 – 868
9.Z. Zhao, Y. Liu, W. Sheng, T. Krishna, Q. Wang and Z. Mao, “Optimizing the data placement and transformation for multi-bank CGRA computing system,” 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, 2018, pp. 1087-1092.
10.Shuai Xie ; Zhongyuan Zhao ; Weiguang Sheng ; Qin Wang ; Zhigang Mao，“MBSS:A General Paradigm for Static Schedule for Nested Loops with Dynamic Loop Boundary on CGRAs”，2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)， Pages: 1 – 8
11.*Qin Wang, Zhenyang Chen, Jianf Jiang, Zheng Guo, Zhigang Mao. Dynamic data split: A crosstalk suppression scheme in TSV-based 3D IC[J]. Integration, 2017, 59(sep.):23-30.
12.Jing Xie, Jin Tian, *Qin Wang, A Concurrent Optimization Method for 3D Power Delivery Network Design[J], IET Circuits, Devices & Systems.
13.Jiachao Chen, *Qin Wang, Zheng Guo, “A Circuit Design of SMS4 against Chosen Plaintext Attack”,2015 International Conference on Computational Intelligence and Security (CIS’2015).
14.Yifan Zhang, Jianfei Jiang,Qin Wang,A Self-Timed Ring based True Random Number Generatoron FPGA, International Conference on Soild-State and Integrated Circuit Technology (ICSICT), 2018
15. Minmin Zhang, Jianfei Jiang, Qin Wang, A Self-Timed Ring Based Time-to-Digital Converter on FPGA, International Conference on Soild-State and Integrated Circuit Technology(ICSICT), ,2018
16.Junye Si, Jianfei Jiang, Qin Wang, Jia Huang, An Efficient Convolutional Neural Network Accelerator on FPGA, International Conference on Soild-State and Integrated Circuit Technology (ICSICT),,2018
17.Jianfei Jiang, Nin Guan, Qin Wang, A High Speed All-Digital True Random Number Generator, International Conference on Soild-State and Integrated Circuit Technology (ICSICT),,2018
18.Jing Xie, Jin Tian, *Qin Wang, A Concurrent Optimization Method for 3D Power Delivery Network Design[J], IET Circuits, Devices & Systems
19.Jiachao Chen, *Qin Wang, Zheng Guo, “A Circuit Design of SMS4 against Chosen Plaintext Attack”,2015 International Conference on Computational Intelligence and Security (CIS'2015) .
20.Jianfei Jiang, Zhigang Mao, Weiguang Sheng，Qin Wang，Weifen He “Design Optimization for Low Swing RC-Limited Global Interconnect”, Journal of Circuits, Systems and Computers Jianfei Jiang, weifeng He, Qin Wang, Zhigang Mao, “Design Optimization for Capacitive-resistively Driven On-chip Global Interconnect,” IEICE Electronics Express, Vol.12, No.8, p1-12, 2015.
21.Jianfei Jiang, Weiguang Sheng, Qin Wang, Zhigang Mao, “Contactless Testing Methodology for Pre-bond Interposer,” IEEE 58th International Midwest Symposium on Circuits and Systems (MWSWCAS), 2015.
22.Mengying Fan,QinWang, Ben van der Waal, Wafer Defect Patterns Recognition Based on OPTICS and Multi-Label Classification, 2016 IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference(IEEE IMCEC 2016 )
23.Qifan Hu, *Qin Wang, Jing Chen, Jing Xie, Zhigang Mao, TSV-to-TSV Crosstalk Induced Delay Analysis for 3D ICs, IEEE 13th International Conference on Solid-State and Integrated Circuit Technology(ICSICT). 2016）
24.Xiaofeng Pan, Jing Xie, Qin Wang, Zhigang Mao ，Noise aware clock tree synthesis for 3d ICs，IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, 2014.
25.Qifan Hu, Qin Wang*, Jing Xie, Jianfei Jiang, Zhigang Mao, Crosstalk Induced Delay Analysis for Through-Silicon-Via-Based 3D ICs, IEEE International Conference on Solid-State and Integrated Circuit Technology 2016.
26.Jiang J, Wang Q, He W, et al. Design optimization for AC coupled on-chip global interconnect[C]// IEEE International Conference on Solid-State and Integrated Circuit Technology. IEEE, 2016:1521-1523.
27.Zhenyang Chen, *Wangqin,etc.,Modeling and Analysis of Signal Transmission with Through Silicon Via (TSV) Noise Coupling (ISCAS2013).
28.Shunqing Yan, Liang Hong, Weifeng He and Qin Wang, Group-Based Fast Decision Algorithm for Intra Prediction in HEVC, Proc. of the 8th Signal-Image Technology and Internet-Based Systems (SITIS) 2012.
29.Shunqing Yan, Yongxin Zhu, Qiannan Zhang, Qin Wang, Ming Ni and Guangwei Xie, A Case Study of CPNS Intelligence: Provenance Reasoning over Tracing Cross Contamination in Food Supply Chain, Proc. of the 32nd International Conference on Distributed Systems (ICDCS)
30.Wang Bin,Xie Jing,Wang Qin, Crosstalk-aware channel transmitting scheme for error resilience NoC interconnects, International Conference on Electronics, Communications and Control （ICECC）, 2011.
31.Wang Bin, Xie Jing, Mao, Zhigang,Wang, Qin, Multiple continuous error correct code for high performance network-on-chip. Microelectronics and Electronics （PrimeAsia）, 2011 Asia Pacific Conference on Postgraduate Research in 2011 , 2011.
32.Yuliang Tao, Guanghui He, Weifeng He, Qin Wang, Jun Ma, Zhigang Mao:Effective multi-standard macroblock prediction VLSI design for reconfigurable multimedia systems. ISCAS 2011: 1487-1490.
33.Jianfei Jiang, Zhigang Mao, Qin Wang, Weiguang Sheng “Design Optimization for Low Swing RC-Limited Global Interconnect”, Journal of Circuits, Systems and Computers.
34.LiYufei，WangQin, etc.A High-Performance Low Cost SAD Architecture for Video Coding,IEEE Transactions on Consumer Electronics,May,2007.
35.WangBing, WangQin, Peng ruihua, Fu yuzhuo,Asynchronous Complex pipeline design based on ARM Instruction Set,Journal of Shanghai Jiaotong University，2008.
2.Qin Wang, Z. Liu, J. Jiang*, N. Jing and W. Sheng, A New Cellular-Based Redundant TSV Structure for Clustered Faults[J]. IEEE transactions on very large scale integration (VLSI) systems, 2019, 27(2):458-467.
3.Jianfei Wang, Qin Wang, Li Jiang, Chao Li, Xiaoyao Liang, and Naifeng Jing*, “IBOM: An Integrated and Balanced On-Chip Memory for High Performance GPGPUs”, IEEE Transaction on Parallel and Distributed Systems (TPDS), 29(3): 586-599, 2018.
4.Qin Wang, Shen F , Shen L ,J Huang, W.Sheng*. Lung Nodule Detection in CT Images Using a Raw Patch-Based Convolutional Neural Network[J]. Journal of Digital Imaging, 2019(32):971-979.
5.Yanan Sun ,Jiawei Gu ,Weifeng He , Qin Wang ; Naifeng Jing, Zhigang Mao； Weikang Qian ; Li Jiang “Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells”， IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: 66 , Issue: 5 , May 2019 ) ，Pages: 753 - 757
6.Taozhong Li, Qin Wang, Yongxin Zhu, Jianfei Jiang, Guanghui He, Jing Jin, Zhigang Mao, Naifeng Jing*, “A Novel Resistive Memory based Process-In-Memory Architecture,ACM Transaction on Design Automation of Electronics System (TODAES), 2019.
7.Sijie Zheng, Hongjun You, Guanghui He, Qin Wang, Tao Si, Jianfei Jiang ;Jing Jin ; Naifeng Jing，“A Rapid Scrubbing Technique for SEU Mitigation on SRAM-Based FPGAs”，2019 IEEE International Symposium on Circuits and Systems (ISCAS)， Pages: 1 – 5
8.Shuo Zhang, Guanghui He, Hai-Bao Chen, Naifeng Jing, Qin Wang，“Scale Adaptive Proposal Network for Object Detection in Remote Sensing Images”， IEEE Geoscience and Remote Sensing Letters，Year: 2019，Volume: 16 , Issue: 6， Pages: 864 – 868
9.Z. Zhao, Y. Liu, W. Sheng, T. Krishna, Q. Wang and Z. Mao, “Optimizing the data placement and transformation for multi-bank CGRA computing system,” 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, 2018, pp. 1087-1092.
10.Shuai Xie ; Zhongyuan Zhao ; Weiguang Sheng ; Qin Wang ; Zhigang Mao，“MBSS:A General Paradigm for Static Schedule for Nested Loops with Dynamic Loop Boundary on CGRAs”，2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)， Pages: 1 – 8
11.*Qin Wang, Zhenyang Chen, Jianf Jiang, Zheng Guo, Zhigang Mao. Dynamic data split: A crosstalk suppression scheme in TSV-based 3D IC[J]. Integration, 2017, 59(sep.):23-30.
12.Jing Xie, Jin Tian, *Qin Wang, A Concurrent Optimization Method for 3D Power Delivery Network Design[J], IET Circuits, Devices & Systems.
13.Jiachao Chen, *Qin Wang, Zheng Guo, “A Circuit Design of SMS4 against Chosen Plaintext Attack”,2015 International Conference on Computational Intelligence and Security (CIS’2015).
14.Yifan Zhang, Jianfei Jiang,Qin Wang,A Self-Timed Ring based True Random Number Generatoron FPGA, International Conference on Soild-State and Integrated Circuit Technology (ICSICT), 2018
15. Minmin Zhang, Jianfei Jiang, Qin Wang, A Self-Timed Ring Based Time-to-Digital Converter on FPGA, International Conference on Soild-State and Integrated Circuit Technology(ICSICT), ,2018
16.Junye Si, Jianfei Jiang, Qin Wang, Jia Huang, An Efficient Convolutional Neural Network Accelerator on FPGA, International Conference on Soild-State and Integrated Circuit Technology (ICSICT),,2018
17.Jianfei Jiang, Nin Guan, Qin Wang, A High Speed All-Digital True Random Number Generator, International Conference on Soild-State and Integrated Circuit Technology (ICSICT),,2018
18.Jing Xie, Jin Tian, *Qin Wang, A Concurrent Optimization Method for 3D Power Delivery Network Design[J], IET Circuits, Devices & Systems
19.Jiachao Chen, *Qin Wang, Zheng Guo, “A Circuit Design of SMS4 against Chosen Plaintext Attack”,2015 International Conference on Computational Intelligence and Security (CIS'2015) .
20.Jianfei Jiang, Zhigang Mao, Weiguang Sheng，Qin Wang，Weifen He “Design Optimization for Low Swing RC-Limited Global Interconnect”, Journal of Circuits, Systems and Computers Jianfei Jiang, weifeng He, Qin Wang, Zhigang Mao, “Design Optimization for Capacitive-resistively Driven On-chip Global Interconnect,” IEICE Electronics Express, Vol.12, No.8, p1-12, 2015.
21.Jianfei Jiang, Weiguang Sheng, Qin Wang, Zhigang Mao, “Contactless Testing Methodology for Pre-bond Interposer,” IEEE 58th International Midwest Symposium on Circuits and Systems (MWSWCAS), 2015.
22.Mengying Fan,QinWang, Ben van der Waal, Wafer Defect Patterns Recognition Based on OPTICS and Multi-Label Classification, 2016 IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference(IEEE IMCEC 2016 )
23.Qifan Hu, *Qin Wang, Jing Chen, Jing Xie, Zhigang Mao, TSV-to-TSV Crosstalk Induced Delay Analysis for 3D ICs, IEEE 13th International Conference on Solid-State and Integrated Circuit Technology(ICSICT). 2016）
24.Xiaofeng Pan, Jing Xie, Qin Wang, Zhigang Mao ，Noise aware clock tree synthesis for 3d ICs，IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, 2014.
25.Qifan Hu, Qin Wang*, Jing Xie, Jianfei Jiang, Zhigang Mao, Crosstalk Induced Delay Analysis for Through-Silicon-Via-Based 3D ICs, IEEE International Conference on Solid-State and Integrated Circuit Technology 2016.
26.Jiang J, Wang Q, He W, et al. Design optimization for AC coupled on-chip global interconnect[C]// IEEE International Conference on Solid-State and Integrated Circuit Technology. IEEE, 2016:1521-1523.
27.Zhenyang Chen, *Wangqin,etc.,Modeling and Analysis of Signal Transmission with Through Silicon Via (TSV) Noise Coupling (ISCAS2013).
28.Shunqing Yan, Liang Hong, Weifeng He and Qin Wang, Group-Based Fast Decision Algorithm for Intra Prediction in HEVC, Proc. of the 8th Signal-Image Technology and Internet-Based Systems (SITIS) 2012.
29.Shunqing Yan, Yongxin Zhu, Qiannan Zhang, Qin Wang, Ming Ni and Guangwei Xie, A Case Study of CPNS Intelligence: Provenance Reasoning over Tracing Cross Contamination in Food Supply Chain, Proc. of the 32nd International Conference on Distributed Systems (ICDCS)
30.Wang Bin,Xie Jing,Wang Qin, Crosstalk-aware channel transmitting scheme for error resilience NoC interconnects, International Conference on Electronics, Communications and Control （ICECC）, 2011.
31.Wang Bin, Xie Jing, Mao, Zhigang,Wang, Qin, Multiple continuous error correct code for high performance network-on-chip. Microelectronics and Electronics （PrimeAsia）, 2011 Asia Pacific Conference on Postgraduate Research in 2011 , 2011.
32.Yuliang Tao, Guanghui He, Weifeng He, Qin Wang, Jun Ma, Zhigang Mao:Effective multi-standard macroblock prediction VLSI design for reconfigurable multimedia systems. ISCAS 2011: 1487-1490.
33.Jianfei Jiang, Zhigang Mao, Qin Wang, Weiguang Sheng “Design Optimization for Low Swing RC-Limited Global Interconnect”, Journal of Circuits, Systems and Computers.
34.LiYufei，WangQin, etc.A High-Performance Low Cost SAD Architecture for Video Coding,IEEE Transactions on Consumer Electronics,May,2007.
35.WangBing, WangQin, Peng ruihua, Fu yuzhuo,Asynchronous Complex pipeline design based on ARM Instruction Set,Journal of Shanghai Jiaotong University，2008.
授课教学
本科生：数字逻辑设计、微电子概论
硕士生：集成电路设计基础、SoC设计技术、微电子技术与项目管理
硕士生：集成电路设计基础、SoC设计技术、微电子技术与项目管理
联系方式
办公地点： 微电子大楼414
办公电话： 34204546-1039
电子邮箱： qinqinwang@sjtu.edu.cn
办公电话： 34204546-1039
电子邮箱： qinqinwang@sjtu.edu.cn
