姜红兰/长聘教轨副教授
个人简介
姜红兰博士,现任上海交通大学微纳电子学系副教授。分别于2011年、2013年获得哈尔滨工业大学测控技术与仪器专业本科学位、仪器科学与技术专业硕士学位,2018年获得加拿大阿尔伯塔大学集成电路与系统专业博士学位,并于同年进入清华大学集成电路学院从事博士后研究工作。2022年加入上海交通大学,从事教学与科研工作。
目前从事计算电路的研究工作,研究方向主要包括近似计算电路设计及其在机器学习中的应用,先后承担了博士后基金及青年基金等科研课题。在IEEE Proceedings、TCAS-I、 TC、DATE等电路设计权威学术期刊及国际会议发表30余篇学术论文。其中,一篇论文被IEEE TC评为2019年11月的封面,一篇会议论文获2016年NanoArch的最佳论文提名。
IEEE会员,国际会议IEEE DATE TPC Member(2021、2022);并担任多个权威学术期刊和会议的审稿人。
研究方向
1.近似计算电路设计与优化
2.基于近似计算的神经网络加速器设计
论文发表
主要期刊论文 (Journal Publications)
1.Honglan Jiang, Shaahin Angizi, Deliang Fan, Jie Han, and Leibo Liu. Non-Volatile Approximate Arithmetic Circuits using Scalable Hybrid Spin-CMOS Majority Gates. IEEE Transactions on Circuits and Systems I, 68(3), 1217-1230, 2021.
2.Honglan Jiang, Francisco J.H. Santiago, Hai Mo, Leibo Liu, and Jie Han. Approximate Arithmetic Circuits: A Survey, Characterization and Recent Applications. Proceedings of the IEEE: 108(12): 2108-2135, 2020.
3.Honglan Jiang, Leibo Liu, Fabrizio Lombardi, and Jie Han. Low-Power Unsigned Divider and Square Root Circuit Designs using Adaptive Approximation. IEEE Transactions on Computers, 68(11): 1635-1646, 2019. (封面)
4.Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, and Jie Han. A high-performance and energy-efficient FIR adaptive filter using approximate distributed arithmetic circuits. IEEE Transactions on Circuits and Systems I, 66(1): 313-326, 2019.
5.Honglan Jiang, Cong Liu, Fabrizio Lombardi, and Jie Han. Low-power approximate unsigned multipliers with configurable error recovery. IEEE Transactions on Circuits and Systems I, 66(1): 189-202, 2019.
6.Honglan Jiang, Cong Liu, Leibo Liu, Fabrizio Lombardi, and Jie Han. A review, classification, and comparative evaluation of approximate arithmetic circuits. ACM Journal on Emerging Technologies in Computing Systems (JETC), 13(4): 60, 2017.
7.Honglan Jiang, Jie Han, Fei Qiao, and Fabrizio Lombardi. Approximate radix-8 booth multipliers for low-power and high-performance operation. IEEE Transactions on Computers, 65(8): 2638–2644, 2016.
8.Siting Liu, Honglan Jiang, Leibo Liu, Jie Han. Gradient descent using stochastic circuits for efficient training of learning machines. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 37(11): 2530-41, 2018.
9.Shaahin Angizi, Honglan Jiang, Ronald F. DeMara, Jie Han, and Deliang Fan. Majority-based spin-CMOS primitives for approximate computing. IEEE Transactions on Nanotechnology, 17(4): 795-806, 2018.
10.Mohammad Saeed Ansari, Honglan Jiang, Bruce F. Cockburn, and Jie Han. Low-power approximate multipliers using encoded partial products and approximate compressors. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 8(3): 404-416, 2018.
主要会议论文 (Conference Publications)
1.Honglan Jiang, Francisco JH Santiago, Mohammad Saeed Ansari, Leibo Liu, Bruce F. Cockburn, Fabrizio Lombardi, and Jie Han. Characterizing Approximate Adders and Multipliers Optimized under Different Design Constraints. Proceedings of Great Lakes Symposium on VLSI, Tysons Corner, VA, USA, 2019, pp. 393-398.
2.Honglan Jiang, Leibo Liu, Fabrizio Lombardi and Jie Han. Adaptive Approximation in Arithmetic Circuits: A Low-Power Unsigned Divider Design. Design, Automation & Test in Europe Conference & Exhibition, Dresden, Germany, 2018, pp. 1411-1416.
3.Honglan Jiang, Leibo Liu, and Jie Han. An Efficient Hardware Design for Cerebellar Models using Approximate Circuits, ACM/IEEE Conf. Hardware/Software Co-design and System Synthesis, Seoul, South Korea, 2017.
4.Honglan Jiang, Chengkun Shen, Pieter Jonker, Fabrizio Lombardi, and Jie Han. Adaptive filter design using stochastic circuit. IEEE Computer Society Annual Symposium on VLSI, Pittsburgh, PA, USA, 2016, pp. 122-127.
5.Honglan Jiang, Cong Liu, Naman Maheshwari, Fabrizio Lombardi, and Jie Han. A comparative evaluation of approximate multipliers. IEEE/ACM International Symposium on Nanoscale architectures, Beijing, China, 2016, pp. 191-196. (最佳论文提名)
6.Honglan Jiang, Jie Han, and Fabrizio Lombardi. A comparative review and evaluation of approximate adders. Proceedings of Great Lakes Symposium on VLSI, Pittsburgh, PA, USA, 2015, pp. 343–348.
7.Zijing Niu, Honglan Jiang, Saeed Ansari, Bruce Cockburn, Leibo Liu and Jie Han. A Logarithmic Floating-Point Multiplier for the Efficient Training of Neural Networks. Proceedings of Great Lakes Symposium on VLSI, Virtual Conference and Exhibition, 2021, pp. 1-6.
8.Zhixi Yang, Honglan Jiang, Xianbin Li and Jun Yang. Power-Efficient Approximate Multiplier Using Adaptive Error Compensation. Proceedings of Great Lakes Symposium on VLSI, Beijing, China, 2020, pp. 205-210.
9.Hao Cai, Honglan Jiang, Menglin Han, Zhaohao Wang, You Wang, Jun Yang, Jie Han, Leibo Liu, and Weisheng Zhao. Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction. IEEE Computer Society Annual Symposium on VLSI, Miami, Florida, USA, 2019, pp. 111-115.
专著和章节
Honglan Jiang, Leibo Liu, Fabrizio Lombardi, Jie Han, “Approximate Arithmetic Circuits: Design and Evaluation,” Chapter 4 in Reda S., Shafique M. (eds) Approximate Circuits, 2019, pp 67-98. Springer Cham.
联系方式
办公地点: 微电子大楼414
办公电话:
电子邮箱: honglan@sjtu.edu.cn
SheXi Agricultural Development Co., Ltd @2018.light