Seminar Information Title: Why Design for Test (DFT) and Where It Goes Time: 10:00-11:30am，March 28, 2013（Thursday） Location: Room 401, School of Microelectronics Speaker: Dr. Liyang Lai (Mentor Graphics) Host: Dr. Xiaoyong Li Abstract With increasing complexity and size of integrated circuits, today’s large SoCs are more and more difficult to test and verify.