Seminar:From System-on-Chip to Network-on-Chip, A DFT Perspective

Time: 13:30–14:15, Oct 12, 2009
Place: Room 401 of the building of school of microelectronics
Title: From System-on-Chip to Network-on-Chip, A DFT Perspective
Speaker: Dr Liu Chunsheng (Senior ASIC design engineer in NVIDIA Corporation)

BIOGRAPHY
Dr. Liu is a senior ASIC design engineer in NVIDIA Corporation, Santa Clara, Californian, USA. He received his B.S. and M.S. degrees in Electrical Engineering from Tsinghua University, Beijing, China in 1997 and 2000, respectively and the Ph.D. degree in Electrical and Computer Engineering, Duke University, North Carolina,USA
Dr. Liu’s research interests include VLSI design and testing, including Scan-based Design-for-Testability (DFT), at-speed testing, clock verification and automation, System-on-Chip (SoC) and Network-on-Chip (NoC) design and testing, Thermal-aware testing, and Fault diagnosis.